OUT instruction proves tricky but perhaps OK now.

Think I've got it. On 1802 I/O is almost like DMA.

For OUT 1 (0x61) the byte cycle after instruction fetch puts the address in R(x) on address bus, does a read, ie. pulls  MRD* low. This causes the memory byte M(R(X)) to go onto the data bus. Here it can be read by an I/O device like 8255 PORT. This is possible because the 1802 also decodes the LSNibble of the 0x6X instruction and puts X (1,2,..7) on the bus.The nBus. In this case above, we enter the )x61= OUT 1 instruction with X=2 and R2 = 0345. The byte at 0345 is 0x0f. So during the cycle after reading OUT 1=0x61 instruction, R(X) = 0345 is put on address bus, MRD* is brought low, N=1 put on nBus and the byte 0x0f is read onto the data bus. Also, R(X) is incremented so is pointing to the next byte in increasing-address string.

Note that to put 0x0f on stack with ldi 0x0f, stxd, we have to increment stack pointer R2 so R2 points to the 0x0f  (0345) not (0344). We have to undo the decrementing of R2 during stxd.

All this took me a while to get right on real 1802 as the issues were compounded be having stack starting at 03ff and increasing into variable RAM territory above there as well as power supply batteries for 1802 getting around 3.5 volts and causing intermittent errors. Each issue confused solving surrounding issues.