The breadboard version of the CDP1802 2 Nano system is starting.
And the schematic for the breadboard is below. But only some of the breadboard is complete. Just wanted to get to stage where hardware derived nops force addresses to increment. The address is picked up by the top nano via blue wires from MA0 to MA7 and timed by yellow TPA,TPB wires.
This address is sent via SPI on white wires to the lower bottom nano,Nb, and sent to serial terminal screen.
The clock only goes at about 1.5 Hz from D3 of Nb. The LEDs are attached to MA0 and MA1 to indicate the 1802 address is cycling. The 1802 data bus, BUS0..BUS7 is hard wired to Vcc and GND rails via 10K resistors corresponding with code $C4, ie nop. So all the 1802 does is continuous nops but increments its address every three cycles of 7 clocks at about 600ms for each clock cycle.
The code for the two nanos. Slave is:
https://pastebin.com/EC7UL3T8
and the master is:
https://pastebin.com/AT99nVvK. Neither are finsihed but the addresses are being transferred slowly and reliably from cycling nop 1802 to top nano Nt, to bottom nano Nb.
